Introduction

    As time goes by, more and more fancy video applications are emerging. On the other hand, the corresponding video coding standards also draws more and more attentions. Being a worldwide leading lab, DSP/IC Design Lab contributes lots of worldwide recorded video coding chips during the past years. For example, the worldwide 1st H.264/AVC encoder, scalable video (SVC) encoder, and multiview video (MVC) encoder designed from us can support the HDTV, video streaming, and 3DTV applications.

    In this year (2010), due to the desire of the future video applications, including the ultra high definition TV and the multi-user/multiview 3DTV, MPEG and VCEG are established a joint group called “joint collaborate team-video coding (JCT-VC)” and call for proposals for the next generation video coding. The main target of them is to achieve the 50% bitrate reduction comparing with the H.264/AVC high profile. In order to hit this target and make the future video applications achievable, DSP/IC Design Lab has also grouped a new research group focus on this challenge.

    We have two main research directions now. The first is the new video coding tools development. Since the current progress from JCT-VC has still long way to go to the 50% bitrate reduction, more efficient coding tools are required. Second, we will focus on the architecture design and try to design the optimized SoC for the real world applications.

 

Projects

A 212MPixels/s 4096×2160p Multiview Video Encoder Chip for 3D/Quad HDTV Applications [ Webpage ] Worldwide 1st MVC Encoder 2009 Solid-State Circuits Conference (ISSCC)

A 59.5mW 4096x2160p Scalable/Multi-view Video Decoder Chip for Quad/3D Full HDTV and Video Streaming Applications [ Webpage ] Worldwide 1st SVC/MVC Video Decoder 2010 Solid-State Circuits Conference (ISSCC)

A 216fps 4096x2160p 3DTV Set-top Box SoC for Free-viewpoint 3DTV Applications [ Webpage ] Worldwide 1st Free-viewpoint 3DTV Set-top Box SoC 2011 Solid-State Circuits Conference (ISSCC)