Introduction

     Intelligent Chip (iChip) group focuses on developing scalable intelligent visual recognition algorithms and architectures based on the inspirations from human neocortices. Currently we have two major research directions:

 

1) Neocortical Computing Algorithm

     The Neocortical Computing algorithms we use are based on latest neural/neuromorphic network algorithms, especially those which directly memorize hierarchical prototypes such that hard real-world problems can be tackled efficiently (e.g. HMAX). In addition to applying existing algorithms, we also attempt to further extend the Neocortical Computing algorithms for handling larger-scale visual recognition problems, by incorporating machine learning-/neocortex-inspired fast visual classification schemes and online learning algorithms. Many other advanced features are under developing too.

 

2) Neocortical Computing Architecture

     To optimally accelerating the Neocortical Computing algorithms, we’re designing an Neocortical Computing Processor with following features. i) A homogeneous many-core application-specific instruction-set processor (ASIP) supporting customized Neocortical Computing ISA. It is programmable and extremely efficient for various intelligent tasks, including object, face, and action recognition. Moreover, a neocortex-inspired automatic learning mechanism is also supported, which means users won’t need to update this chip manually. The homogeneity of this many-core architecture also ensures its scalability. ii) A fully scalable NoC design supporting neocortex-like communications. Unlike any other commonly used NoC structure, the proposed NoC acts like a small-world network, which means even when far more cores need to be supported, the NoC still can provide low-delay and high-bandwidth interconnections. Just like the neocortex, the proposed NoC does not require any specialized central router or hub. Everything is distributed.