The world population is aging rapidly. It is crucial to provide adequate health care for the elders. Heart disease is one of the most prevailing and dangerous diseases among others of longevity, and remains by far the main cause of death. More than 5,000 people, for instance, experience sudden cardiac arrest (SCA) every week in the US. The chance for survival drops 10 percent per minute without defibrillation, and more than 95 percent of SCA victim die [1]. Thus it is of great interest to provide timely warning against fatal vascular signs.

    Efforts are spent on body sensors these years to support the need in the healthcare applications [2]. To build a practical realtime heart status monitoring and analyzing system, several design requirements should be considered. Compact form factor and low power consumption are two primary issues for the mobile or wearable devices. In addition, to provide timely warning against the SCA, the system demands essential computation capability to perform signal processing algorithms in a real time. Flexibility should also be provided to adjust the algorithm parameters for different individuals and circumstances, which may easily disrupt the system robustness otherwise.

    Most commercial ECG holters utilize off-the-shelf components and have the lifetime less than 12 hours. Due to the advance in silicon technology, the components are being integrated on chip to reduce the form factor and power consumption. The analog frontend modules including the amplifier, filter, and ADC were first implemented on a single IC and consume micro-Watt power [3]. A wireless transceiver and programmable digital controllers were further integrated as a system on chip (SoC) for the complete sensor node [4]. Such encapsulated sensor node could be realized in the form of a thin and flexible patch, and is capable of transmitting ECG signals wirelessly for days. Afterwards, more digital features were explored on chip for more functionalities. To provide point-of-care capability, a sub-threshold general purpose processor (GPP) was embedded on the sensor node, and the heart rate calculation was demonstrated with 2.6 mW power [5]. Transmitting the raw data wirelessly dominates the power consumption on sensor node. Application specific processor (ASP) was thus implemented to compress and encrypt the ECG raw signals [6] in order to further save the power.

    In this project, on-chip digital system is implemented to distinguish the normal ECG rhythm from the Ventricular Fibrillation (VF) as well as the Premature Ventricular Contraction (PVC) in a real time. Patients with PVC are at higher risk for future systemic embolic events, including ischemic stroke and ischemic bowel disease. VF may cause sudden cardiac death. The proposed system can not only record a cardiac healthy reference but also make an alarm during the SCA. To provide timely warning against the fatal vascular signs, based on the Chaotic Phase Space Differential (CPSD) algorithm, on-sensor processors are implemented to detect the abnormal ECG for VF, VT and PVC. The on-sensor processing reduces 98.0% power of wireless data transmission for raw ECG signals. The application specific processor is designed to accelerate CPSD algorithm with 1.7mW power while the OpenRISC is integrated to provide the system flexibility. The architecture is realized on the FPGA platform to physically demonstrate the detection of the abnormal ECG signals in a real time.

The illustration of CPSD algorithm. (a) is the ECG signal derived from normal into VF. (b) is the phase space matrix constructed from normal ECG signal in the training state and served as a reference in the testing stage. (c) is the phase space matrix constructed from normal ECG signal in testing, while (d) is the phase space matrix constructed from VF ECG signal in testing.(e) and (f) shows the difference phase space matrix of (b)-(c) and (d)-(c), respectively. An typical VF ECG signal spreads out on the phase space while normal ECG signal does not. (g) shows the corresponding CPSD value and threshold for VF.

The architecture of the proposed system with the on-chip ASP and GPP.

The block diagram of the integrated ASP for CPSD acceleration.

The ECG signals are amplified and filtered by the in-house instrument amplifier IC. Then the A/D converter on FPGA board converts the analog ECG into digital samples at 256 samples per second (sps). Afterwards, the proposed digital system with ASP and GPP performs the CPSD calculation. The FPGA is connected to a laptop with RS-232, and the filtered raw data as well as the CPSD index are fetched and displayed with GUI on the screen.

IMPLEMENTATION RESULTS OF DIGITAL SECTION IN 90 NM CMOS PROCESS

REFERENCES

[1] J. J. de Vreede-Swagemakers and et al., “Out-of-hospital cardiac arrest in the 1990’s: a population-based study in the Maastricht area on incidence, characteristics and survival,” J. Am. Coll. Cardiol., vol. 30, pp. 1500–1505, Nov 1997.

[2] Guang-Zhong Yang, Body Sensor Networks, Springer-Verlag, 2006.

[3] X. Xiaoyuan and et al., “A 1-v 450-nw fully integrated biomedical sensor interface system,” in IEEE Symposium on VLSI Circuits, june 2008, pp. 78–79.

[4] A. C. Wong and et al, “A 1v, micropower system-on-chip for vitalsign monitoring in wireless body sensor networks,” in ISSCC Dig. Tech. Papers, Feb. 2008, pp. 138–602.

[5] S. C. Jocke and et al., “A 2.6- mw sub-threshold mixed-signal ecg soc,” in IEEE Symposium on VLSI Circuits, june 2009, pp. 60–61.

[6] H. J. Kim and et al., “A low energy bio sensor node processor for continuous healthcare monitoring system,” in Proc. IEEE Asian Solid-State Circuits Conference, Nov. 2008, pp. 317–320.

 

 

    Biomedical sensors equipped with online physiological-signal feature analysis (PFA) processor can enhance applications such as responsive neurostimulation (RNS), brain computer interface, ambulatory monitor with vital sign detection, body sensor network, etc. The VLSI hardware is attractive because of the power and area constraints imposed by the portable and implantable requirements. Although many advanced PFA algorithms have been proposed and the micro-watt multi-channel signal acquisition circuitry has been designed [1], only basic analysis tools are implemented on-chip for few recording channels [2-3]. In this paper a 16-channel smart brain sensor (SBS) is designed by integrating a digital electroencephalogram (EEG)/electrocorticogram (ECoG) processor (DEEP) with the analog signal acquisition circuitry (ASAC). In the proposed DEEP, the PFA procedure shown in Fig. 1 is efficiently mapped into a three-stage pipelined structure. Dedicated processing units, reconfigurable logics, and a reduced instruction set computer are jointly utilized to provide the intensive computation as well as the flexibility. Multi-domain features are extracted for multiple channels for more accurate analysis. The interpretation of the features can be programmed according to the application requirements. The processing response can be as short as 0.1sec for the real-time constraint. 1.4μW/channel power is achieved by realizing the advanced architecture in 90nm process.

Fig. 1. Procedure of Physiological-signal Feature Analysis.

The proposed digital EEG/ECoG Processor (DEEP). The PFA of brain signals is composed of three sequential stages: pre-processing (PP), feature extraction (FE), and classification and decoding (CD). These stages are mapped into three processing pipelines with heterogeneous hardware units reflecting the needs on each stage.

The die micrograph and chip specifications are shown in Fig. 5. The 16-channel smart brain sensor SoC consumes 14.8mm2 area and 14.4μW/channel power. The integrated DEEP consumes 2.1mm2 and 1.4μW/channel with 231k logic gates and 64.1kb SRAMs.

RNS is the emerging therapy to control the epilepsy. RNS interrupts the epileptic seizure by sending the electrical stimuli into the brain before the seizure onset. Figure 6 demonstrates that the DEEP analyzes the ECoG and detects the early stage of a chemically-induced seizure for the rat. The decreased brain chaoticity, the increased temporal energy, and the oscillation frequency of the rhythmic discharge were observed sequentially on the feature space. The on-chip RISC performed the fast K nearest neighbor algorithm [7] in a real time to activate the stimulator once the seizure is detected.

REFERENCES

[1] R. F. Yazicioglu, , et al., "A 200μW Eight-Channel Acquisition ASIC for Ambulatory EEG Systems," ISSCC Dig. Tech. Papers, pp. 164-603, Feb. 2008.

[2] N. Verma., wt al., "A Micro-power EEG acquisition SoC with integrated seizure detection processor for continuous patient monitoring," Symp. on VLSI Circuits, pp 62-63, June 2009

[3] A. C.-W. Wong, , et al., "A 1V, Micropower System-on-Chip for Vital-Sign Monitoring in Wireless Body Sensor Networks," ISSCC Dig. Tech. Papers, pp. 138-602, Feb. 2008.

[4] Yu-Hsin Chen, , et al., “Sub-microwatt Correlation Integral Processor for Implantable Closed-loop Epileptic Neuromodulator,” to appear, Int. Symp. on Circuits and Syst., May 2010.

[5] R. R. Harrison, et al., “A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural Recording System,” IEEE J. Solid-State Circuits, vol. 42, no. 1, pp. 123-133, 2007.

[6] R. R. Harrison, et al., “A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural Recording System,” IEEE J. Solid-State Circuits, vol. 42, no. 1, pp. 123-133, 2007.

[7] Yu-Hsin Chen, et al., “Sub-microwatt KNN Classifier for Implantable Closed-loop Epileptic Neuromodulation System,” Int. Symp. on Bioelectron. and Bioinf., Dec. 2009.

 

 

    Epilepsy is one of the common and devastating neurological disorders. About 30 % of patients would be still suffered from epilepsy recurrence despite the carefully optimized drug therapy. Brain stimulation becomes an emerging therapy for the epilepsy control in the last decade. The idea of sending stimulating current to the particular brain region to break down or suppress the epileptic neuronal firing has been proven to be effective for interrupting epilepsy recurrence. The therapeutic efficacy may be further improved if the biomarkers extracting on-line from the dynamic changes of brain could be featured to provide a feedback mechanism by employing a closed-loop system. The whole integrated project includes: (1) Development the automatic algorithm for seizure prediction; (2) Closed-loop stimulation SoC with brain signal sensing unit, the signal characteristics analyzing/decision unit, and the functional electrical stimulator; (3) Creating chemical- and electrical-induced temporal lobe epilepsy (TLE) animal models in order to find the optimized proposal for stimulation. (4) Application of clinical trial of this closed-loop stimulation SoC.

Problems to be Addressed

Approach and Architecture

Working Items

Performance Summary

 

 

    Heart is one of the most important organs of human. It pumps blood to flow through the whole body. However, if there is disorder happening in heart, it is so vital as to take away human life in a very sudden way. Statistics show that heart disorder ranks very high within the human death causes. Our research mission is to deliver effective detection and tracking means to help people to know their heart status.

Auscultation

    Auscultation has been a historic diagnosis method for heart diseases. Heart sound waveforms are measured from human chest and back as depicted in the following figure:

    These waveforms reflect the status of the hard working hearts of human beings. Plenty of biomedical information is conveyed by these measurements.

Heart Murmur Gradations

    There has been a rating table for measuring heart murmur grades as listed in following table:

    If heart disorder exists, it might result in murmur in different grades. To capture the existence of the murmur is the very important first step to aid diagnose. Once one’s heart is suspicious to have disorder conditions, echocardiography cound be conducted in hospitals to ensure the healthiness of the heart. One thing worth noticing is that the seriousness of the heart disorder is not proportional to the murmur grades. More care should be put on the change of the murmur grade which reflect the disorder is getting better off or worse. A long-term tracking scheme is also a main topic in our research development in order to monitor the heart healthiness in a comprehensive manner.